This invention relates generally to sigma-delta (SD) modulators and, more specifically, to SD modulators used in analog-to-digital converter circuitry and that employ a dither signal to improve their performance.
SD modulators used in analog-to-digital converters (ADCs) are well known in the art. Reference may be had, by example, to S. R. Norsworthy et al., xe2x80x9cDelta-Sigma Data Convertersxe2x80x9d, IEEE Press, NY, 1997, and to J. G. Proakis et al., Digital Signal Processingxe2x80x9d Third Edition, Prentice-Hall, 1996.
Conventional SD modulators are known to suffer from the generation of tones, i.e., undesirable signals that manifest themselves as periodic fluctuations, the amplitude and frequency of which are a function of the amplitude and frequency of the input signal. The tones are generated mainly because the quantization noise is not always random, especially when the input signal amplitude and frequency are low. A conventional technique to overcome this problem is to use a dither signal that is added to the input signal. Reference in this regard can be had to U.S. Pat. No. 5,889,482, xe2x80x9cAnalog-to-Digital Converter Using Dither and Method for Converting Analog Signals to Digital Signalsxe2x80x9d, by M. Zarubinsky et al. The approach of Zarubinsky et al. is to add in the dither signal in the SD modulator, and to then cancel or suppress the dither signal before it reaches the output terminal of the ADC. This technique is said to preserve a high signal-to-noise ratio (SNR) and to provide low spectral tones in the output signal. If the input signal to the converter has a small amplitude, then the signal at the output of sigma-delta modulator is highly correlated with the dither signal D. If the input signal is close to the maximum admissible amplitude, the modulator partially suppresses the dither signal, and the output signal remains substantially without non-linear distortions.
FIG. 4B of Zarubinsky et al. shows the dither signal D, which can be a multilevel signal with different magnitudes between maximum and minimum values. The magnitude of the dither signal is expressed as BD, which remains constant over one time interval, and where a step index n various randomly.
A disadvantage of the use of the dither signal, in particular one with a constant amplitude, is that the maximum allowable input signal at the input to the SD modulator is reduced as the probability is increased of overloading the quantizer. The end result is a reduction in the dynamic range of the ADC.
A need exists to provide an improved sigma-delta modulator and a dither signal, in particular a switched capacitor (SC) SD modulator, as well as a continuous time SD modulator, where the use of the dither signal does not have an adverse effect on the dynamic range of the ADC, and where the dither signal is generated in a simple manner that makes efficient use of integrated circuit area and that operates with a small power consumption.
It is a first object and advantage of this invention to provide an improved sigma-delta modulator.
It is a further object and advantage of this invention to provide an improved sigma-delta modulator that does not suffer from a significant reduction in dynamic range due to the use of a dither signal.
The foregoing and other problems are overcome and the foregoing objects and advantages are realized by methods and apparatus in accordance with embodiments of this invention.
The teachings of this invention provide embodiments of low complexity, single-bit SD modulators that employ a dither signal having an amplitude that is a function of the amplitude of the input signal to the SD modulator. The teachings of this invention apply as well to multi-bit SD modulators. In these embodiments pseudorandom noise is added to an input of a SD modulator quantizer as a dither signal, and the amplitude of the pseudorandom noise is controlled in such a manner as to be inversely proportional to the amplitude of the input signal, i.e., the amplitude of the dither signal is smallest when the amplitude of the input signal is largest and vice versa.
In the presently preferred embodiments at least one linear feedback shift register (LFSR) is used to generate a pseudorandom code sequence that in turn is used to control the switching of voltage potentials to inputs of banks of voltage variable capacitances coupled to input nodes of the quantizer. The variation in capacitance at the input nodes of the quantizer generates voltage transitions in the quantizer input signal, thereby dithering the input signal to the quantizer.
In a further embodiment of this invention embodiment of this invention the instantaneous amplitude of the input signal is quantized with at least one low complexity window detector which controls the clock signal to the at least one LFSR.
A method is disclosed to operate a sigma-delta modulator of a type that includes a quantizer. The method has steps of (a) sampling an amplitude of an input signal to the sigma-delta modulator; and (b) controlling the switching of a capacitance bank in accordance with the sampled amplitude of the input signal for generating a dither signal at an input of the quantizer. The dither signal is generated to have a pseudorandom amplitude that is inversely proportional to the sampled amplitude of the input signal. The step of controlling and generating operates a linear feedback shift register to switch individual ones of a plurality of capacitances of the bank of capacitances in and out of a capacitance network. In one embodiment the step of operating the at least one linear feedback shift register turns a linear feedback shift register clock signal on and off as a function of the amplitude of the input signal. Preferably the step of sampling samples the input signal to prevent a generation of kickback noise.
In one embodiment the step of sampling operates at least one window detector, and the dither signal is turned off and on depending on a relationship between the amplitude of the input signal and voltage thresholds of the at least one window detector.
In another embodiment the step of sampling operates a rectifier that rectifies an input signal to the quantizer to provide a rectified output signal, and the step of controlling and generating pseudorandomly applies the rectified output signal to the bank of capacitances for controlling an amount of current that is transferred between the input of the quantizer and the bank of capacitances.
In both of these embodiments the presence of the dither signal reduces the undesirable tones in the output signal when the tones are most disturbing (i.e., when the input signal is absent or at a low level), while not degrading the performance of the SD modulator when the input signal amplitude is large.
As the dither signal is random or pseudorandom in nature in both of disclosed embodiments, circuitry that is both simple and inaccurate can be used in the implementation, thereby reducing the required integrated circuit area and power consumption. These are important considerations when the SD converter, and an ADC, are used in mass produced, battery operated consumer goods, such as handheld cellular telephones and personal communicators.